The FMC256 is an FPGA Mezzanine Card (FMC) per VITA 57.1 standard, offering a small footprint and providing high speed serial communication, ADC,
DAC and digital I/O.
Two LTC2378-20 each provide an input channel ADC of 20-bits at 1 MSPS, and two AD5791 each provide an output channel DAC of 20-bits. Discrete digital I/O comprises 4 outputs. A QSFP28 connector provides four SERDES organised as two pairs. Each pair is supported by an onboard clock and could run at different speed rate. The modules allow synchronization from clocks coming from the Carrier. The Module does not follow the VITA57 height constrain. It has an additional Daughter card that mates to the FMC module to allow it to accommodate the ADC/DAC channels. For example, on the AMC FPGA FMC Carriers, it requires a full-height AMC panel to accommodate all the I/Os. The Carrier must have a monolithic panel (the FMC256 does not come with an FMC panel) to cover the FMC256 I/O envelope
Key Features
• Four SERDES to QSFP28 to allow for high-speed multi-
protocol communicate via Fiber or Copper
• On board PLL to lock to input clock for synchronization
• Two channels SAR ADC based on LTC2378, 20-bit at
one MSPS
• Two channels DAC based on AD5791, 20-bit
• Four digital Output (could be used for Trig In/Out)
• Standard VITA 57.1 FMC
