The FMC253 is an FMC per VITA 57 specification. The unit utilizes the following components to provide dual channel high-speed ADC, single channel high-speed DAC and single channel low-speed ADC:
AD9689 for dual channel ADC providing 14-bit conversion rates of up to 2.6 GSPS
AD9164 (option for AD9162) for DAC 16-bit conversion rates of up to 12 GSPS
AD9467 to offer an additional ADC channel providing 16-bit conversion at up to 250 MSPS
The FMC253 is identical to the FMC251 except with respect to clocking. The FMC253 clocks the high-speed DAC/ADC with the same PLL clock. Although the high-speed DAC is capable of running at a faster clock rate, the FMC253 allows the highest clock rate dictated by the ADC9689. The FMC253 also has a jitter cleaner on the clock input of the low speed AD9467 to provide a much lower jitter clock.
The unit provides a Trigger Input/Output, clock and all analog Input/Output via SSMC connectors.
Key Features
ADC dual channel 14-bit @ 2.6 GSPS (AD9689)
DAC 16-bit @ 12 GSPS (AD9164/AD9162)
ADC 16-bit @ 250 MSPS (AD9467)
FPGA Mezzanine Card (FMC) per VITA 57
Front panel interface includes Trig In/Out
Clock input for synchronization via front or rear
