The VPX589 provides dual-channel ADC with sample rates of up to 6.4 GSPS (TI ADC12DJ3200, ADC12DJ2700, or ADC12DJ1600) at 12-bits (or quad inputs at 3.2 GSPS) and a dual DAC update rate of up to 12 GSPS (Analog Devices AD9162 or AD9164) and direct RF synthesis at 6 GSPS at 16-bits making it suitable for signal capture/analysis applications such as COMINT/SIGINT, radar, research and instrumentation.
The unit has an on-board Virtex UltraScale+™ XCVU13P FPGA which interfaces directly to ADC/DAC. The FPGA has interface to a bank of 64-bit wide DDR4 memory channels with a total of 8 GB memory.
The module routes x16 SERDES to P1 which could run any protocol (i.e PCIe/SRIO/10G/40G/Aurora) and x8 SERDES with 16 LVDS signals to P2.
The unit is available in a range of temperature and shock/vib specifications per ANSI/VITA 47, up to V3 and OS2.
Xilinx Virtex UltraScale+™ XCVU13P FPGA
Dual ADC @ 6.4 GSPS 12-bits or quad ADC at 3.2 GSPS with TI ADC12DJ3200
Option for ADC12DJ3200, ADC12DJ2700 or ADC12DJ1600
Dual DAC @ 12 GSPS 16-bits (AD9162 or AD9164)
16 SERDES as PCIe/SRIO/10GbE/40GbE/Aurora to P1
8 SERDES as PCIe/SRIO/10GbE/40GbE/Aurora to P2
Clock Jitter cleaner
Option for Direct RF Clock sampling for the ADC/DAC
Single bank of DDR4 64-bit wide 8 GB Total
Health Management through dedicated Processor
